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Network Processors

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Network processors are integrated circuit devices that combine the speed of ASIC (application-specific integrated circuits) with a CPU to provide high-performance networking solutions. ASIC technology is widely used to classify, filter, and forward IP traffic. However, The problem with ASICs is that they are hardwired with a specific feature set. If the feature set is changed or upgraded, the ASIC must be replaced. When new standards come along (MPLS and Diff-Serv are examples a recent standards developments), ASICs must be replaced, while network processors can be reprogrammed.

Network processors solve this problem and provide increased performance. A network processors is a high performance programmable I/O device. The programmability is what sets network processors apart from ASICs. Network processors reduce time to market for vendors who build network devices by enabling them to write code for a communications processor, as opposed to creating one-shot ASICs. This strategy also extends the lifetime of devices by allowing vendors to add new features to devices.

The network processor can be programmed to support custom algorithms. The processors are optimized to perform a variety of functions in network devices, including frame classification, filtering, forwarding, marking, policing, traffic shaping, and Diff-Serv routing. These features are associated with switches that provide QoS, traffic prioritization, and traffic management. Policies that control the flow of traffic are implemented in software, so these policies are easily upgraded. Network processors are used in the same way as ASICs. They are placed in the data path of network switching devices and connected directly to the physical interface. The processors may also perform framing, segmentation and reassembly, and other functions.

EZchip's TOPcore network processor technology integrates many small and fast processors, each optimized to perform specific tasks and able to deliver tenfold improvement in performance over other network processor architectures based on generic RISC processors. The four TOPs (task-optimized processors) are TOPparse (packet parse and classify), TOPsearch (search and lookup), TOPresolve (forwarding and QoS decisions), and TOPmodify (packet modification). A system can perform complex packet manipulation and seven-layer packet processing at 10-Gigabit/OC-192 rates, scalable to 40-Gigabit/OC-768.

Copyright (c) 2001 Tom Sheldon and Big Sur Multimedia.
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